The invention relates, in general, to flash memory devices and, more particularly, to a flash memory device and a method of manufacturing the same, in which degradation of the characteristics of a tunnel oxide layer can be prevented.
As the level of integration of semiconductor devices increases, it becomes difficult to align floating gates and isolation layers in the process of manufacturing a flash memory device. Thus, the floating gates are aligned using a Self Aligned Floating Gate (SAFG) process. The SAFG process is a process of forming a polysilicon layer for a floating gate in a semiconductor substrate, using an etch process to sequentially etch the polysilicon layer and the semiconductor substrate, thus forming trenches, and burying the trenches with insulating material, thus patterning the polysilicon layer while forming isolation layers.
In the existing method, however, at the time of the process of forming the tunnel oxide layer, the thickness at the top corners of the tunnel oxide layer, which is formed in the active region, becomes thinner than that at the central portion of the tunnel oxide layer. This phenomenon causes degradation in the characteristics of the tunnel oxide layer, and affecting the characteristics of a program/erase cycle.